Semiconductor Package Design Engineers - WLCSP, Flip Chip, QFN
IDj-6245
Job TypeDirect Hire
Remote TypeHybrid
Compensation$160000 - $210000 / yr
We seek proven packaging design talent for an Austin client.
A leading global supplier of low-power, high-precision mixed-signal processing solutions. World-class innovators that are hyper-specialized offering game-changing microchips that captivate billions of global users every single day. This client dominates by tightly integrating three core pillars: Ultra-Low-Power, High-Precision Analog Architecture; Patented Hardware-Software Co-Design; and co-developing custom silicon directly with top-tier OEMs.
Work closely with internal and external customers to develop cutting-edge packaging solutions for high-performance mixed-signal products ... Design package layouts, stack-ups, drawings, models, simulations, and design documentation to verify compliance with requirements and design standards ... Work with global integrated circuit and board teams to drive package designs that meet performance, reliability, and manufacturability requirements ... Interface with cross functional teams (Design, Layout) to define package requirements from electrical, thermal, and mechanical point of view ... Resolve design issues between the piece part and PCB ... Drive continuous improvement processes to assure accuracy between the interface of the package to the die and PCB.
Our client’s packaging technologies span: Wafer-Level Chip-Scale Packaging (WLCSP) for Ultra-Mobile Devices … High-Density Flip-Chip & System-in-Package (SiP) Routing … JEDEC-Compliant Quad Flat No-Lead (QFN). This is a chance to be part of a package design team supporting challenging customer expectations and a growing business.
Skills & Experience that will get our attention:
- MS/BS delivering cutting-edge packaging solutions for high-performance mixed-signal products with breadth and depth designing for manufacturability.
- Breadth and depth across packaging technologies, materials, package substrate design, and assembly rules.
- Strong tools user: AutoCAD, GDS tools, Siemens Fast3D, Calibre DRV, and Cadence SiP to complete physical design, electrical simulation, and manufacturing validation solution for package design, including die bump array - BGA integration refinement.
- DFM checking and modification to improve assembly yield and prevent manufacturing issue.
- The proven ability to collaborate with global cross functional teams (Customer, Designers, OSATs).
- Maintain design rules. Promote automation processes.
Preferred Skills and Qualifications:
- Conversant with PCB and Die mechanical layout tools (e.g. Siemens Xpedition, Allegro PCB, Cadence Virtuoso)
Title: Package Design Engineers (mid to senior career)
Location: Austin, TX (hybrid workplace). Relocation assistance offered.
Compensation: Base salaries $160,000 - 220,000 DOE. Additional bonus(s) and RSUs offered. Comprehensive benefits.
Current USA H-1B visa holders and TN eligible are encouraged to apply.